Several types of interface module providing a connection between a first circuit and a second circuit are known. Said modules include a data storage zone constituted by registers or by a memory having various addresses provided by the first circuit during a data acquisition stage and by the second circuit during a data transmission stage. An address multiplexer makes such alternating addressing by the first and second circuits possible. Nevertheless, said module suffers from the drawback of requiring a number of input connections and a number of output connections that is not less than the set of all the address signals issued by the first and second circuits.
It is also known that the provision of address signals by the first circuit and by the second circuit can be omitted by using a first-in first-out (FIFO) structure for the storage zone, in which case management of the storage zone becomes more complex.
It is also known, in particular from patent application No. WO-A-82 01429, corresponding to U.S. Pat. No. 4,394,729, that a last-in first-out (LIFO) structure can be used for this storage zone. However, means are not provided for monitoring and verifying that the number of data items read from the storage zone corresponds to the number of data items previously recorded therein.
The present invention as defined in the accompanying claims solves the problem of creating a data transfer interface module without requiring complex management of the storage zone, without requiring addressing signals to be received from the first and second circuits, and also making it possible to monitor proper operation of data transfer.